This document is a data sheet for Altera Configuration EPROMs designed to store configuration data for SRAM-based FLEX devices. The serial EPROM family supports 5.0-V and 3.3-V operation and features an easy-to-use 4-pin interface. It includes devices such as the EPC2, which offers reprogrammable FLASH configuration memory and in-system programmability (ISP) via the IEEE Std. 1149.1 JTAG interface.
| Operation Voltage | 5.0-V and 3.3-V |
|---|---|
| Interface | 4-pin interface |
| Standby Current | near-zero |
| Package Types | 8-pin PDIP, 20-pin PLCC, 32-pin TQFP |
| EPC2 Memory Type | reprogrammable FLASH |
| EPC2 ISP Support | IEEE Std. 1149.1 JTAG |
| EPC2 Memory Capacity | 1,695,680 x 1-bit |
| EPC1 Memory Capacity | 1,046,496 x 1-bit |
| EPC1441 Memory Capacity | 440,800 x 1-bit |
| EPC1213 Memory Capacity | 212,942 x 1-bit |
| EPC1064 Memory Capacity | 65,536 x 1-bit |
The devices support 5.0-V and 3.3-V operation.
Yes, the EPC2 has reprogrammable FLASH configuration memory with in-system programmability (ISP) through the JTAG interface.
No, the EPC1441, EPC1064, and EPC1064V devices do not support data cascading.