Altera EP220 / EP224 Classic EPLDs are high-performance, low-power Erasable Programmable Logic Devices (EPLDs) with 8 macrocells. Combinatorial speeds as low as 7.5 ns, counter frequencies up to 100 MHz, pipelined data rates up to 115 MHz, maximum 5.5-ns Clock-to-output time, minimum 4.5-ns setup time.