UT54LVDS032 is a high performance, low power LVDS receiver from UT company, supporting 155.5Mbps data rate.
The UT54LVDS032 quad receiver is a CMOS differential line receiver designed for ultra‑low power dissipation and high‑speed data transmission. It accepts 340 mV differential inputs and provides 5 V TTL‑compatible outputs, with built‑in fail‑safe circuitry for open, shorted, or terminated inputs.
Key specifications include data rates above 155.5 Mbps, propagation delay up to 8 ns, differential skew up to 3 ns, and a maximum power dissipation of 1.25 W. The device is offered in a 16‑lead flat‑pack, with various lead‑finish options and radiation‑hardening levels available through the ordering information.
| Differential input voltage | 340 mV |
|---|---|
| Supply voltage (VDD) | 5 V ±10 % |
| Power dissipation | 1.25 W |
| High‑level input voltage (VIH) | 2.0 V |
| Low‑level input voltage (VIL) | 0.8 V |
The recommended VDD is 5 V with a tolerance of ±10 %.
The internal fail‑safe circuitry forces the output to a stable HIGH state for open, shorted, or terminated inputs.