This datasheet provides detailed information on the features and characteristics of the CY7C4255/65 8K/16Kx18 deep synchronous FIFOs
The CY7C4255 (8 K × 18) and CY7C4265 (16 K × 18) are high‑speed, low‑power first‑in‑first‑out (FIFO) memories with a fully asynchronous read/write interface. They operate up to 100 MHz (10 ns read/write cycle) and provide TTL‑compatible I/O, output‑enable control, and programmable Almost‑Empty/Almost‑Full flags.
Both devices can be cascaded for depth expansion and combined for width expansion, allowing flexible buffering solutions for data‑acquisition, multiprocessor, and communications applications. The parts are offered in 64‑pin PLCC and 64‑pin TQFP packages and are pin‑compatible with the CY7C42X5 family.
| Memory depth | 8 K × 18 (CY7C4255) / 16 K × 18 (CY7C4265) |
|---|---|
| Word width | 18 bits |
| Maximum operating frequency | 100 MHz |
| Active power supply current (industrial) | 50 mA |
| Package types | 64‑pin PLCC, 64‑pin TQFP |
| Storage temperature range | –65 °C to +150 °C |
The devices operate up to 100 MHz.
Yes, depth can be expanded by cascading devices using the WXI/RXI and WXO/RXO pins.