CYPRESS CY7C1470V33 CY7C1472V33 CY7C1474V33 Manual

The document introduces the three SRAMs, CY7C1470V33, CY7C1472V33 and CY7C1474V33. They support 250MHz bus operation and have 3.3V/2.5V power supply. They also support single byte write operation.


CYPRESS CY7C1470V33 CY7C1472V33 CY7C1474V33 Manual - cover page
Brand
Cypress
Category
Memory
Document type
Datasheet
Language
English
Pages
28
File format
PDF
File size
379 KB
Published
05 June, 2012
Updated
30 September, 2023
MD5 checksum
C7EDAA2704129DBD6D3ED81B53CF2F04

About this manual

The document details the Cypress Semiconductor CY7C1470V33, CY7C1472V33, and CY7C1474V33 synchronous pipelined burst SRAMs. These devices are designed to support unlimited true back-to-back Read/Write operations with no wait states, utilizing advanced No Bus Latency (NoBL) logic.

What's inside

  • Features
  • Functional Description
  • Pin Configurations
  • Selection Guide
  • Pin Definitions

Specifications

Memory Capacity2M x 36 / 4M x 18 / 1M x 72
Operating VoltageSingle 3.3V power supply
Max Access Time (250 MHz)3.0 ns
Max Operating Current500 mA

Frequently asked questions

What is the maximum operating frequency?

The devices support bus operations up to 250 MHz.

Are these parts pin-compatible with ZBT devices?

Yes, they are pin-compatible and functionally equivalent to ZBT devices.

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