PSoC™ is a mixed-signal array that includes an on-chip controller, designed to replace multiple traditional MCU-based system components with one low-cost single-chip programmable device. The device includes configurable blocks of analog and digital logic, as well as programmable interconnects. This architecture allows the user to create customized peripheral configurations that match the requirements of each individual application. In addition, a fast CPU, Flash program memory, SRAM data memory, and configurable IO are included in a range of convenient pinouts and packages.
The CY8C24x23A family of PSoC devices combines a Harvard‑architecture 8‑bit CPU with configurable analog and digital blocks. Each device offers up to 4 KB of flash, 256 bytes of SRAM, and up to 2 KB of EEPROM‑emulated memory, operating from 2.4 V to 5.25 V (down to 1.0 V with the internal oscillator). The core runs at up to 24 MHz and provides a rich set of peripherals such as UART, SPI, I²C, PWM, timers, and programmable gain amplifiers.
Development is supported by the free PSoC Designer IDE, which includes a device editor, design browser, application editor, debugger, and in‑circuit emulator. Cypress also provides development kits, tele‑training, application notes, and technical support to help engineers bring designs to market quickly.
| SRAM data storage | 256 Bytes |
|---|---|
| EEPROM emulation | up to 2 KB |
| Operating voltage | 2.4 V to 5.25 V (down to 1.0 V with internal oscillator) |
| CPU speed | up to 24 MHz |
| ADC resolution | up to 14‑bit |
| DAC resolution | up to 9‑bit |
| Digital PSoC blocks | 4 |
They operate from 2.4 V to 5.25 V, and can run down to 1.0 V when using the internal oscillator.
Cypress supplies the free PSoC Designer IDE, a Windows‑based integrated development environment.
The devices support ADCs with up to 14‑bit resolution.