This datasheet introduces the features of Cypress Semiconductor's 3.3V 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching CY7C43644AV/CY7C43664AV/CY7C43684AV.
The CY7C43644AV, CY7C43664AV and CY7C43684AV are 3.3 V, low‑power, bidirectional synchronous FIFO memories with up to 133 MHz clock operation. Each device provides two independent 1 K/4 K/16 K × 36‑bit dual‑port SRAM FIFOs, configurable for big‑ or little‑endian data formats and featuring mailbox registers for bypass operation.
The documents include full pin‑out tables, electrical characteristics, maximum ratings, and timing diagrams. They also describe reset options (master and partial reset), programmable flag thresholds, and power‑down behavior, as well as package information (128‑pin TQFP) and environmental specifications.
| Maximum Frequency | 133 MHz (CY7C43644AV) |
|---|---|
| Maximum Access Time | 6 ns (CY7C43644AV) |
| Minimum Cycle Time | 75 ns (CY7C43644AV) |
| Density | 1 K × 36 × 2 (CY7C43644AV) |
| Package | 128‑pin TQFP |
| Active Power Supply (Commercial) | 60 mA |
| Operating Temperature Range | 0 °C to 70 °C |
| Input ESD Protection | >2001 V |
The CY7C43644AV operates up to 133 MHz.
All three devices are supplied in a 128‑pin TQFP package.
The devices provide a Master Reset and a Partial Reset, each with dedicated pins.
They are specified for operation from 0 °C to 70 °C.