STMicroelectronics PSD913F2/PSD934F2/PSD954F2 Preliminary Information

PSD913F2, PSD934F2, PSD954F2 are three programmable memory systems. Working voltage is 5V or 3.3V, with 2Mbit main memory, 256Kbit secondary memory, 256Kbit SRAM, 2000+ DPLD gates, 27 reconfigurable I/O ports, enhanced JTAG serial port, programmable power management unit, high durability


STMicroelectronics PSD913F2/PSD934F2/PSD954F2 Preliminary Information - cover page
Brand
STMicroelectronics
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
94
File format
PDF
File size
476 KB
Published
01 June, 2012
Updated
30 September, 2023
MD5 checksum
1840BD852AE3A67927FF5C241A7202DB

About this manual

The PSD9XX family provides configurable memory systems for 8‑bit microcontrollers, offering up to 2 Mbit of primary flash, a 256 Kbit secondary flash, up to 256 Kbit SRAM, and more than 2,000 gates of programmable logic. The devices include 27 reconfigurable I/O ports, programmable power management, and a JTAG‑compliant serial port for in‑system programming.

Programming can be performed via In‑System Programming (ISP) using the JTAG interface or In‑Application Programming (IAP) where the MCU accesses one flash while the other is being programmed. The built‑in power‑management unit supports automatic power‑down, and the devices operate from a single 5 V (±10 %) or 3.3 V (±10 %) supply. Standby current can be as low as 50 µA for 5 V parts.

What's inside

  • Introduction
  • Key Features
  • Block Diagram
  • Programming Methods (ISP & IAP)
  • Power Management
  • Memory Architecture
  • I/O Ports
  • Package Information

Specifications

Single Supply Voltage (3.3 V version)3.3 V ±10 %
Primary Flash Memoryup to 2 Mbit
Secondary Flash Memory256 Kbit
SRAMup to 256 Kbit
Programmable Logic Gatesover 2,000 gates
Flash Endurance≥ 100,000 erase/write cycles
PLD Endurance≥ 1,000 erase/write cycles
Data Retention15 years

Frequently asked questions

How many erase/write cycles can the flash memory and PLD handle?

The flash memory is rated for at least 100,000 erase/write cycles, while the PLD is rated for at least 1,000 cycles.

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