80960JD is a 32-bit embedded microprocessor. It is pin/code compatible with all 80960Jx processors, has high-performance embedded architecture, two caches, high bandwidth burst bus and many new instructions.
The Intel 80960JD is a 32‑bit embedded microprocessor offering high‑performance execution with a core clock that runs at twice the bus clock. It includes on‑chip instruction and data caches, a 1 KB data RAM, and a flexible memory‑mapped control register interface.
The device provides a programmable interrupt controller with 31 priorities, two independent 32‑bit timers, and a halt mode that can reduce power consumption by up to 90 %. It supports selectable 8‑, 16‑, and 32‑bit bus widths and both big‑ and little‑endian byte ordering, and is available in 132‑lead PGA and PQFP packages.
| Core Clock Rate | 2× the Bus Clock |
|---|---|
| Instruction Cache | 4 Kbyte |
| Data Cache | 2 Kbyte |
| Interrupt Priorities | 31 programmable priorities |
| On‑Chip Timers | Two independent 32‑bit timers |
| Halt Mode Power Savings | Up to 90 % reduction |
| Bus Width Options | 8‑, 16‑, 32‑bit selectable |
| Byte Ordering | Big or Little Endian |
| Package Types | 132‑Lead PGA and 132‑Lead PQFP |
The core clock runs at twice the bus clock rate.
It supports 31 programmable interrupt priorities.
Halt mode can reduce power consumption by up to 90 %.
The processor is offered in 132‑lead PGA and 132‑lead PQFP packages.