MICROCHIP AN851 A FLASH Bootloader for PIC16 PIC18 Devices handbook

This document introduces the self-programming ability of Microchip's Enhanced FLASH Microcontroller devices


MICROCHIP AN851 A FLASH Bootloader for PIC16 PIC18 Devices handbook - cover page
Brand
MICROCHIP
Category
Other Electronics
Document type
Application Note
Language
English
Pages
38
File format
PDF
File size
813 KB
Published
04 May, 2012
Updated
30 September, 2023
MD5 checksum
981388EA5C3C6AB1AA0F20C0749A3B36

About this manual

The AN851 application note explains Microchip's flash bootloader for PIC16 and PIC18 devices. It details how the boot block in program memory is used, the communication protocol over USART, and the command set that enables reading, writing, and erasing memory.

The document provides implementation guidance, including buffer limits, packet format, control‑character handling, and example software tools for programming the devices. It also covers configuration‑bit access, boot‑mode entry and exit, and debugging considerations.

What's inside

  • Introduction
  • Firmware Overview
  • Communications Settings
  • Memory Organization
  • Command Interpreter
  • Bootloader Operation
  • Programming Interface
  • Example Software

Specifications

Receive/Transmit Buffer size255 bytes
Maximum packet length255 bytes
PIC18 boot block size512 bytes
PIC16 boot block size256 words
PIC18 write block size8 bytes
PIC18 erase block size64 bytes
PIC16 write block size8 bytes (4 words)
Default baud rate9600 bps
UART data format8 data bits, No parity, 1 stop bit
Boot mode flag valueFFh indicates boot mode

Frequently asked questions

What is the maximum packet size the bootloader can handle?

The bootloader supports packets up to 255 data bytes, limited by the 255‑byte receive/transmit buffer.

How do I enter and exit boot mode on a PIC device?

Boot mode is entered when the last data‑memory location contains FFh; writing any other value and resetting the device exits boot mode.

What are the default serial communication settings for the bootloader?

The bootloader uses the USART configured for 8 data bits, no parity, 1 stop bit, typically at 9600 bps.

How are control characters like STX, ETX, and DLE handled in the protocol?

The bootloader inserts a DLE before any control character in the data field (byte stuffing) and does not include control characters in the checksum.

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