This document is about ICs for Communications Enhanced Serial Communication Controller ESCC2 SAB 82532 SAF 82532 Version 3.2 User's Manual
The Enhanced Serial Communication Controller (ESCC2) SAB 82532/SAF 82532 is a multiprotocol data communication IC with two symmetrical full‑duplex serial channels. It supports asynchronous, synchronous character‑oriented, and HDLC/SDLC protocols, includes on‑chip clock generation, DPLL, and programmable baud‑rate generators, and can be interfaced with 8/16‑bit microprocessors via a 16‑bit parallel bus.
The manual describes pin configurations, functional block diagrams, register sets, electrical characteristics, package options (P‑LCC‑68 and P‑MQFP‑80), and application notes such as time‑slot packet networking and LAN interfaces. It also covers DMA operation, interrupt handling, flow‑control features, and power consumption details.
| Maximum data rate | 10 Mbit/s |
|---|---|
| FIFO size per channel | 64 bytes per direction |
| Power consumption (active) | 40 mW at 2 MHz |
| Power consumption (standby) | 5 mW (typical) |
| Number of serial channels | 2 |
The device supports data rates up to 10 Mbit/s.
It consumes about 40 mW when operating at 2 MHz.
Each channel provides a 64‑byte FIFO for each direction.