This document introduces the features and characteristics of TMS320VC33 series, including the processor model, floating point operation capability, instruction cycle, etc.
The TMS320VC33 is a 32‑bit floating‑point digital signal processor built on 0.18‑µm CMOS technology. It offers a 13‑ns instruction cycle, up to 150 MFLOPS of floating‑point performance, and 120 MIPS, with extensive on‑chip memory and peripheral resources.
The document includes detailed pinout tables, terminal function descriptions, a functional block diagram, mechanical dimensions for the 144‑pin LQFP package, and an important notice covering warranty and usage terms.
| Instruction Cycle Time | 13 ns |
|---|---|
| On‑Chip Memory | 34 K × 32‑bit (1.1 Mbit) |
| Package | 144‑pin low‑profile quad flatpack (LQFP) |
| Core Supply Voltage | 1.8 V (CVpp) |
| I/O Supply Voltage | 3.3 V (DVpp) |
The instruction cycle time is 13 ns.
The device is packaged in a 144‑pin low‑profile quad flatpack (LQFP).
The core CPU uses a 1.8 V supply (CVpp) and the I/O pins use a 3.3 V supply (DVpp).