TERIDIAN 73S1217F handbook
Update: 30 September, 2023
The Teridian Semiconductor Corporation 73S1217F is a versatile and economical CMOS System-on-Chip device intended for smart card reader applications. The circuit features an ISO-7816 / EMV interface, an USB 2.0 interface (full-speed 12Mbps - slave) and a 5x6 PINpad interface. Additional features include 8 user I/Os, multiple interrupt options and an analog voltage input (for DC voltage monitoring such as battery level detection). Other built-in interfaces include an asynchronous serial and an I2C interface. The System-on-Chip is built around an 80515 high-performance core. Its feature and instruction set is compatible with the industry standard 8051, while offering one clock-cycle per instruction processing power (most instructions). With a CPU clock running up to 24MHz, it results in up to 20MIPS available that meets the requirements of various encryption needs such as AES, DES / 3-DES and even RSA (for PIN encryption for instance). The circuit requires a single 6 to 12 MHz crystal. An optional 32kHz crystal can be connected to a sub-system oscillator with a real-time-clock counter to enable stand-alone applications to access an RTC value. The respective 73S1217F embedded memories are; 64KB Flash program memory, 2KB user XRAM memory, and 256B IRAM memory. On top of these, the 73S1217F includes a 128-bit unique serial number (UID) that can be used for identification purposes.
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MD5 Checksum: BD74BD8CD508A54E0C6A4000FBC2E705
Publication date: 09 April, 2012
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TERIDIAN 73S1217F handbook PDF