Texas Instruments TMS320DM642 Handbook


Texas Instruments TMS320DM642 Handbook - cover page
Brand
Texas Instruments
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
178
File format
PDF
File size
1.5 MB
Published
28 March, 2012
Updated
29 September, 2023
MD5 checksum
E4190D53A510A970E99B7D78297AF0F8

About this manual

The TMS320DM642 is a high‑performance video/imaging fixed‑point digital signal processor featuring a VLIW architecture, up to eight independent functional units, and extensive peripheral support such as Ethernet, video ports, and audio interfaces. It offers clock rates of 500 MHz, 600 MHz, or 720 MHz and delivers up to 5760 MIPS.

The device includes a 128‑Kbit (16 KB) L1 program cache, a 128‑Kbit (16 KB) L1 data cache, and a 2‑Mbit (256 KB) unified L2 cache. External memory is accessed via a 64‑bit EMIF with a total addressable space of 1024 MB. Peripherals include a 10/100 Mb/s Ethernet MAC, 64‑channel EDMA, three configurable video ports, and a multichannel audio serial port.

What's inside

  • Features
  • Description
  • Functional Block Diagram
  • Device Characteristics
  • CPU Core Description
  • Memory Map Summary
  • Peripheral Overview
  • Pin Assignments
  • Development Tools
  • Device Configurations

Specifications

Clock Rate500 MHz, 600 MHz, 720 MHz
Instruction Cycle Time2 ns, 1.67 ns, 1.39 ns
MIPS Performance4000, 4800, 5760 MIPS
L1 Program Cache128 Kbit (16 KB) direct‑mapped
L1 Data Cache128 Kbit (16 KB) 2‑way set‑associative
L2 Unified Cache2 Mbit (256 KB) unified
External Memory Interface64‑bit EMIF, 1024 MB address space
EDMA Channels64 independent channels

Frequently asked questions

What is the maximum clock rate of the TMS320DM642?

The DSP can operate at 500 MHz, 600 MHz, or 720 MHz.

How much external memory can the DM642 address?

It can address up to 1024 M‑byte of external memory.

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