AD9281 is a dual channel, 8-bit CMOS ADC with low power dissipation, single supply, low distortion, high signal-to-noise ratio and dynamic range.
The AD9281 is a dual‑channel, 8‑bit, 28 MSPS CMOS analog‑to‑digital converter optimized for applications that require close matching between two ADCs, such as I/Q channels. It integrates on‑chip input buffers, a bandgap reference, and a multiplexed digital output bus, eliminating the need for external op‑amps in most designs.
The document provides full electrical specifications, absolute maximum ratings, pin descriptions, functional block diagrams, and mechanical dimensions for the 28‑lead SSOP package. It also includes typical performance curves for INL, DNL, SNR, SFDR, THD, and power consumption across frequency and temperature ranges.
| Resolution | 8 Bits |
|---|---|
| Conversion Rate | 28 MHz (28 MSPS) |
| Power Consumption | 225 mW (typical at 3 V) |
| Supply Voltage | 2.7 V to 5.5 V |
| Input Voltage Range | -0.5 V to AVDD/2 |
| Signal‑to‑Noise Ratio (SNR) | 49.2 dB |
| Spurious‑Free Dynamic Range (SFDR) | -65 dB |
| Differential Nonlinearity (DNL) | +0.1 LSB |
| Integral Nonlinearity (INL) | ≤0.25 LSB |
| Package | 28‑Lead SSOP (RS‑28) |
The AD9281 consumes about 225 mW when operated from a 3 V supply.
The analog input range is –0.5 V to AVDD/2 volts.
The device is offered in a 28‑lead shrink small‑outline package (SSOP).
The AD9281 can sample at up to 28 MSPS (28 MHz).