The AD9281 is a complete dual channel, 28 MSPS, 8-bit CMOS ADC. The AD9281 is optimized specifically for applications where close matching between two ADCs is required (e.g., I/Q channels in communications applications). The 28 MHz sampling rate and wide input bandwidth w
The AD9281 is a complete dual‑channel 8‑bit CMOS analog‑to‑digital converter optimized for applications that require tightly matched I and Q channels. It operates from a single 2.7 V to 5.5 V supply, consumes only 225 mW at 3 V, and integrates on‑chip input buffers and a bandgap reference.
The datasheet provides detailed specifications, pin configuration, absolute maximum ratings, typical performance curves, and ordering information for the 28‑lead SSOP package. It also describes the pipeline architecture, input buffering, and reference circuitry that give the device its high dynamic performance.
| Resolution | 8 Bits |
|---|---|
| Conversion Rate | 28 MHz (28 MSPS) |
| Power Consumption | 225 mW (typical) |
| Operating Voltage (AVDD) | 2.7 V to 5.5 V |
| Input Bandwidth (Full Power) | 245 MHz |
| Differential Nonlinearity | +0.1 LSB |
| Integral Nonlinearity | ≤0.25 LSB |
The AD9281 samples at 28 MSPS (28 MHz) per channel.
It consumes about 225 mW of power when powered at 3 V.
The analog input range is –0.5 V to AVDD/2.
The device is offered in a 28‑lead SSOP package.