This document describes the features and characteristics of Micron Technology, Inc.'s 512Mb DDR SDRAM products, including voltage, data transfer method, clock input, command input, auto refresh, and self-refresh modes.
The document describes Micron's 512 Mb DDR SDRAM family, covering three device configurations: 32 Meg × 4 × 4 banks (MT46V128M4), 16 Meg × 8 × 4 banks (MT46V64M8) and 8 Meg × 16 × 4 banks (MT46V32M16). It outlines the double‑data‑rate architecture, programmable burst lengths, power‑down modes, and temperature ratings.
Key sections include functional description, state diagram, pin and ball assignments for TSOP and FBGA packages, timing parameters, command set, and electrical specifications such as voltage and power consumption. The datasheet also provides tables for speed‑grade compatibility and address mapping.
| Capacity | 512 Mb (x4, x8, x16) |
|---|---|
| Organization (MT46V128M4) | 32 Meg × 4 × 4 banks |
| Organization (MT46V64M8) | 16 Meg × 8 × 4 banks |
| Organization (MT46V32M16) | 8 Meg × 16 × 4 banks |
| Burst Length | Programmable 2, 4, or 8 locations |
| Voltage | VDD ≈ 4.2 V, VDDQ = 2.5 V + 0.2 V |
The device supports programmable burst lengths of 2, 4, or 8 locations.
VDD is approximately 4.2 V and VDDQ is 2.5 V plus 0.2 V.