Atmel AVR1509 Low Power Training Handbook

Introduces the low power features of Atmel XMEGA microcontrollers, including various sleep modes and software controlled clock gating, and details how to shut down unused peripheral clocks in both normal operation mode and sleep mode.


Atmel AVR1509 Low Power Training Handbook - cover page
Brand
Atmel
Category
Other Electronics
Document type
Other
Language
English
Pages
12
File format
PDF
File size
213 KB
Published
27 March, 2012
Updated
30 September, 2023
MD5 checksum
4E78F0D72475D900A91A8A4698927656

About this manual

The handbook introduces Atmel XMEGA low‑power concepts, describing the various sleep modes (Idle, Power‑down, Power‑save, Standby, Extended Standby) and how clock gating and peripheral control affect power consumption. It also explains the Power Reduction (PR) registers that allow selective disabling of peripheral clocks.

Practical training tasks are included, such as a basic sleep example, configuring Power‑save mode with the RTC, using PR registers, and measuring current consumption on the Xplain evaluation board with a shunt resistor. Additional resources and Atmel support contacts are listed at the end.

What's inside

  • Introduction
  • Sleep modes
  • Power reduction registers
  • Other power‑saving tips
  • Measuring current consumption
  • Training tasks overview
  • Resources
  • Technical support

Specifications

PRGEN register address+0x00
PRPA register address+0x01
Supported sleep modesIdle, Power‑down, Power‑save, Standby, Extended Standby

Frequently asked questions

What prerequisites are required for the AVR1509 training?

The training requires knowledge of Atmel XMEGA basics, clock system, optional DMAC and ADC, AVR Studio 4.18 or later, WinAVR/GCC, an XPLAIN evaluation board, and a JTAGICE mkII.

Which sleep mode keeps the RTC running while the CPU is stopped?

Power‑save mode keeps the RTC clock running, allowing wake‑up from RTC overflow or compare‑match interrupts.

How can peripheral clocks be disabled on an XMEGA device?

Peripheral clocks can be stopped using the Power Reduction (PR) registers, which gate the clock to individual modules.

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