This datasheet introduces the AD7762, a 625 kSPS, 24-bit, 109 dB Σ−Δ ADC with on-chip buffer.
The AD7762 is a high‑performance 24‑bit analog‑to‑digital converter designed for high‑speed data‑acquisition applications. It features a fully differential input, on‑chip buffer, programmable FIR filter, and low‑power operation modes, delivering up to 625 kSPS with dynamic ranges up to 120 dB.
The document includes detailed specifications, absolute maximum ratings, pin‑out diagrams, timing diagrams, layout recommendations, and register maps. It also describes power‑dissipation figures for normal, low‑power, and standby modes, as well as guidance for bias resistor selection and decoupling.
| Dynamic Range (78 kHz ODR) | 120 dB typ |
|---|---|
| Signal‑to‑Noise Ratio (78 kHz ODR) | 112 dB typ |
| Total Power Dissipation (Normal mode) | 958 mW max |
| Supply Voltage (AVpp) | 2.5 V |
| Resolution | 24 bits |
| Integral Nonlinearity | 0.00076 % typ |
| Group Delay (Decimate by 32, 40 MHz MCLK) | 47 µs typ |
The AD7762 can output up to 625 kSPS (625 kHz) fully filtered.
In normal mode the device dissipates up to 958 mW, in low‑power mode up to 661 mW, and in standby mode the clock‑stopped consumption is 6.35 mW.
The AD7762 operates from –40 °C to +85 °C (commercial grade).