The DS26524 is a single-chip 4-port framer and line interface unit (LIU) combination for T1, E1, and J1 applications. Each channel is independently configurable, supporting both long-haul and short-haul lines.
The DS26524 is a single‑chip 4‑port framer and line‑interface unit (LIU) that can be configured for T1, E1, or J1 operation. Each channel includes a line interface, framer, HDLC controller, elastic store, and backplane interface, and is controlled via an 8‑bit parallel port.
The document provides feature highlights, detailed functional descriptions, pin and register tables, timing diagrams, and compliance specifications. It also covers clock synthesis, jitter attenuation, line‑interface options, and diagnostic loopbacks for system integration and troubleshooting.
| Supply Voltage | 3.3 V with 5 V tolerant inputs and outputs |
|---|---|
| Package | 256‑ball TE‑CSBGA |
| Number of Ports | 4 independent transceiver ports |
| Supported Line Types | T1, E1, J1 |
| Master Clock Options | 1.544 MHz, 2.048 MHz, 3.088 MHz, 4.096 MHz, 6.276 MHz, 8.192 MHz, 12.552 MHz, 16.384 MHz |
| Receive Signal Level Indication | -2.5 dB to -36 dB (T1) / -2.5 dB to -44 dB (E1) |
It requires a 3.3 V supply and its inputs and outputs are 5 V tolerant.