The 74LVQ74 is a low voltage CMOS dual D-type flip flop with preset and clear non-inverting. It is fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology, making it ideal for low power and low noise 3.3V applications. It has better speed performance at 3.3V than the 5V LSTTL family, combined with true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, providing 2KV ESD immunity and transient excess voltage capabilities.
The 74LVQ74 is a low‑voltage CMOS dual D‑type flip‑flop with preset and clear, designed for 3.3 V applications. It provides high‑speed operation (250 MHz typical), low power dissipation (2 mW max) and 2 kV ESD immunity, making it suitable for low‑noise, low‑power designs.
The device features TTL‑compatible output levels, symmetrical output impedance, and balanced propagation delays. Detailed electrical specifications include supply voltage 2 V‑3.6 V, maximum output current 50 mA, and typical propagation delay of 2.7 ns. It is offered in a TSSOP‑14 package with defined mechanical dimensions.
| Maximum Clock Frequency | 250 MHz (typ.) at Vcc = 3.3 V |
|---|---|
| Supply Voltage Range | 2 V to 3.6 V |
| ESD Immunity | 2 kV |
| Typical Propagation Delay (tPLH) | 2.7 ns |
The device can operate up to 250 MHz typical at a 3.3 V supply.
It operates from 2 V to 3.6 V.
The inputs and outputs have 2 kV ESD immunity.
Typical propagation delay (tPLH) is 2.7 ns.