This datasheet provides information about the dsPIC30F6011A/6012A/6013A/6014A devices, including features, pinouts, and package dimensions
The dsPIC30F6011A/6012A/6013A/6014A family provides a high‑performance RISC CPU with Harvard architecture, up to 30 MIPS operation, and a rich set of peripherals including multiple timers, UARTs, CAN modules, and ADCs. The devices support up to 144 KB of flash program memory, 8 KB of data RAM, and 4 KB of EEPROM, all within an industrial‑grade temperature range.
The handbook includes pin‑out diagrams for 64‑pin and 80‑pin TQFP packages, electrical characteristics, ordering information, and a global sales and service network for Microchip products. This manual is written in Chinese.