Microchip PIC24FJ64GA004 User Manual

This datasheet introduces the features of PIC24FJ64GA004 series microcontrollers, including CPU, memory, analog characteristics, peripheral characteristics, etc.


Microchip PIC24FJ64GA004 User Manual - cover page
Brand
MICROCHIP
Category
Other Electronics
Document type
User Manual
Language
Chinese
Pages
6
File format
PDF
File size
269 KB
Published
23 December, 2011
Updated
30 September, 2023
MD5 checksum
9CDB2BA131633DC4E8EC0BE0E6F529A2

About this manual

The PIC24FJ64GA004 is a 16‑bit flash microcontroller offering up to 16 MIPS CPU performance, 2.0 V‑3.6 V operating voltage, and on‑chip peripherals such as a 13‑channel 10‑bit ADC, enhanced USART, PWM, real‑time clock/calendar, and an on‑chip LDO regulator. It supports multiple power‑saving modes and JTAG boundary‑scan for development.

The manual includes detailed pin‑out tables for 28‑pin PDIP/SOIC, 44‑pin QFN and TQFP packages, electrical characteristics, memory organization (up to 12 MB flash and 64 KB RAM), and usage guidelines for the device’s peripherals and programming interfaces. This manual is written in Chinese.

What's inside

  • Features
  • Pin Configuration
  • Electrical Characteristics
  • Peripheral Features
  • Legal Notice

Specifications

CPU speed16 MIPS
Operating voltage2.0 V to 3.6 V
Flash program memoryup to 12 MB
Data RAMup to 64 KB
ADC channels13 channels, 10‑bit, 500 ksps
Internal oscillator8 MHz with 4× PLL
On‑chip LDO regulatorpresent
JTAG supportboundary‑scan supported
Real‑Time Clock/Calendartime, date, week functions
PWM resolution16‑bit

Frequently asked questions

What is the operating voltage range of the PIC24FJ64GA004?

The device operates from 2.0 V up to 3.6 V.

How much flash program memory does the PIC24FJ64GA004 provide?

It can hold up to 12 MB of flash program memory.

How many ADC channels are available and what is their speed?

The microcontroller offers up to 13 channels of 10‑bit ADC with a conversion rate of 500 ksps.

Does the PIC24FJ64GA004 support JTAG debugging?

Yes, it supports JTAG boundary‑scan debugging.

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