Fairchild Manuals (Industrial)

This document describes the assembly guidelines for the Fairchild Dual Power33 package, which uses Molded Leadless Packaging (MLP) technology and has low package height and excellent thermal performance.

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This application note introduces the MicroFET 1.6x1.6 package technology, including MLP technology, package design, and assembly process

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Fairchild’s GreenBridge™ solution reduces power losses in the bridge circuit and leads to an efficient and cost-effective PoE system.

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This manual introduces the use of Power56 MOSFET, including mounting techniques and circuit design. The MOSFET has the characteristics of miniaturization, high performance and low power consumption.

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This application note focuses on the soldering and back end processing of the Dual Power56

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This document introduces an empirical self-heating SPICE MOSFET model which accurately portrays the vertical DMOS power MOSFET electrical and thermal responses.

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This document presents an empirical self-heating SPICE MOSFET model that accurately portrays the vertical DMOS power MOSFET electrical and thermal responses. This macro-model implementation is the culmination of years of evolution in MOSFET modeling. This new version brings together the thermal and the electrical models of a VDMOS MOSFET. The existing electrical model [2,3] is highly accurate and is recognized in the industry. The sequence of the model calibration procedure using parametric data is described. Simulation response of the new self-heating MOSFET model track the dynamic thermal response and is independent of SPICE’s global tem- perature definition.

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The Power MOSFET is a very popular switching device used in switching power supplies and DC-DC converters. Their operation frequency is being continuously increased to reduce size and increase power density. This causes high di/dt, intensifies the negative effect from parasitic inductances, and results in high voltage spike between the Power MOSFET drain and source during device turn off. The spike is worst at power on due to empty bulk capacitors and small inductance because the transformer primary side inductance almost reaches the level of leakage inductance. Fortunately, the Power MOSFET is equipped to withstand a certain level of stress, unnecessitating expensive protection circuits. This note presents an effective way to determine the applicability of a Power MOSFET in an application. The designers can balance between cost and reliability.

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This application note provides information on how to select FETs for primary side switches in 48V power converters. Basic topologies of different 48V power converters are introduced and detailed guidelines for selecting FETs are provided.

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This document provides an overview of how to design printed circuit boards (PCBs) for embedded switching power supplies. It covers the key rules and considerations to keep in mind when designing a PCB, as well as how to avoid some common mistakes.

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This document introduces how to maximize the power handling capability of SOT-223 Power MOSFETs. This document provides the optimum design method of copper mounting pads to improve component performance and circuit board packing density.

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This document describes the features and advantages of Wafer level chip scale packaging (WLCSP) technology, as well as manufacturing process optimization recommendations for Fairchild Semiconductor WLCSP components.

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This paper discusses how to improve the power performance of the SuperSOTTM-6 Power MOSFET by optimizing the design of copper mounting pads. By using the thermal solution suggested in the document, users can take full advantage of the exceptional performance features of Fairchild Semiconductor's latest Power MOSFET, including very low on-resistance and improved junction-to-case thermal resistance (RθJC). This ultimately leads to improved component performance and higher circuit board packing density.

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This design guide describes the design of asymmetric PWM half-bridge converters using Fairchild FSFA-series power switches (FPSTM) with a current doubler and synchronous rectifier.

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This document introduces practical aspects of using PowerMOS transistors to drive inductive loads, including application scenarios, circuit principles, and characteristic analysis.

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This application note describes a test method for testing the safe operating area of power MOS transistors without a heat sink. The method does not use a heat sink, but relies on the thermal capacitance (CT) of the package to allow prediction of the case temperature during SOA testing.

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This document introduces the features and characteristics of Fairchild MicroFET™ package, including small size, low weight, thin base and good thermal and electrical performance.

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This application note presents practical step-by-step design considerations for an interleaved Boundary-Conduction- Mode (BCM) Power-Factor-Correction (PFC) converter employing Fairchild PFC controllers FAN9611 and FAN9612. It includes designing the inductor and Zero- Current-Detection (ZCD) circuit, selecting the components, and closing the control loop. The design procedure is verified through an experimental 400W prototype converter. The FAN9611/12 interleaved dual BCM PFC controller operates two parallel-connected boost power trains 180º out of phase, extending the maximum practical power level of this control technique from 200-300W to greater than 800W. Unlike the Continuous Conduction Mode (CCM) technique often used at this power level, BCM offers inherent zero-current switching of the boost diodes (no reverse-recovery losses), which permits the use of less expensive diodes without sacrificing efficiency. Furthermore, the input and output filters can be made smaller due to ripple cancellation between the power stages and the effective doubling of the switching frequency. The advanced line feed-forward with peak detection circuit minimizes the output voltage variation during line transients. To guarantee stable operation with less switching loss at light load

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This application note describes a 150W rating design guideline for LED street lighting. The application design consists of CRM PFC and LLC SRC with high power factor and high power conversion efficiency using FL7930B and FAN7621S.

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This application note presents a LED application design guide using the FL7930 BCM Power-Factor-Correction (PFC) controller. It includes the design steps for inductor and Zero-Current-Detection (ZCD) circuit, component selection, and control loop closure. The FL7930 has additional features such as overvoltage protection and PFC-ready pin for triggering other power stages or synchronization with PFC voltage condition.

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