This manual provides a detailed overview of the Loongson 2F processor, covering its micro‑architecture, instruction set, memory management mechanisms, cache hierarchy, and system control registers. It is organized into sections that explain each functional block and includes tables and diagrams for reference.
Key sections include the description of CP0 control registers, processor exceptions, floating‑point unit, privileged instructions, DDR2 SDRAM controller configuration, and integrated I/O controller. Appendices list the new integer and floating‑point instructions introduced in the 2F core. This manual is written in Chinese.
CP0 control registers provide system‑level control functions such as TLB management, exception handling, and processor configuration.
Exceptions are described in the "Processor Exceptions" section, which details the generation, vector locations, priority, and handling procedures for various exception types.