This document is about the product information of Analog Devices company, introducing the features and characteristics of AD9635 12-bit pipeline ADC.
The AD9635 is a dual-channel, 12-bit, 80 MSPS/125 MSPS serial LVDS 1.8 V analog-to-digital converter (ADC) featuring an on-chip sample and hold circuit. It is designed for low cost, low power consumption, small size, and ease of use. The device supports conversion rates up to 125 MSPS with excellent dynamic performance.
The ADC operates from a single 1.8 V supply and accepts LVPECL/CMOS/LVDS compatible sampling rate clock signals. It includes features such as programmable output clock and data alignment, built-in digital test code generation, and flexible power-down modes for each channel or the entire chip. This manual is written in Chinese.
| Sampling Rate (Max) | 80 MSPS / 125 MSPS |
|---|---|
| Power Consumption (Per Channel @ 125 MSPS) | 115 mW |
| Signal-to-Noise Ratio (SNR) | 71 dBFS @ 9.7 MHz |
| Spurious-Free Dynamic Range (SFDR) | 93 dBc @ 9.7 MHz |
| Differential Nonlinearity (DNL) | -0.1 LSB to +0.2 LSB (Typical @ 25°C) |
| Integral Nonlinearity (INL) | ±0.4 LSB (Typical @ 25°C) |
| Analog Bandwidth | 650 MHz |
The conversion rate can reach up to 125 MSPS.
Yes, it features an on-chip sample and hold circuit.
The power consumption is 115 mW per channel at 125 MSPS.
It requires a single 1.8 V power supply.