Altera RapidIO MegaCore Function User Guide

Introduces the RapidIO MegaCore Function, including features, usage, etc.


Altera RapidIO MegaCore Function User Guide - cover page
Brand
Altera
Category
Chips
Document type
User Manual
Language
English
Pages
226
File format
PDF
File size
4 MB
Published
09 August, 2012
Updated
30 September, 2023
MD5 checksum
26825244C1F1413D3BFFECF61BE2EAC7

About this manual

The Altera RapidIO MegaCore Function User Guide describes the Altera RapidIO MegaCore function for the RapidIO interconnect standard. It covers features and supported transactions, device family support, verification, performance and resource utilization, installation, and licensing.

The guide also covers the MegaWizard Plug-In Manager, SOPC Builder, and Qsys design flows, parameter settings, functional descriptions of the physical, transport, and logical layers, signal and software interface details, testbenches, and design examples.

What's inside

  • About This MegaCore Function
  • Getting Started
  • Parameter Settings
  • Functional Description
  • Signals
  • Software Interface
  • Testbenches
  • SOPC Builder Design Example
  • Qsys Design Example
  • Initialization Sequence

Frequently asked questions

What is the RapidIO interconnect?

The text describes it as an open standard developed by the RapidIO Trade Association and a high-performance packet-switched interconnect technology.

What applications does the Altera RapidIO MegaCore function target?

It targets high-performance, multicomputing, high-bandwidth, and coprocessing I/O applications.

Which design flows are described in the guide?

The guide covers the MegaWizard Plug-In Manager, SOPC Builder, and Qsys design flows.

Download PDF (4 MB)

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