Altera DDR3 SDRAM Controller with ALTMEMPHY IP User Guide

About this manual

This document is the user guide for the Altera DDR3 SDRAM Controller with ALTMEMPHY IP, part of the External Memory Interface Handbook Volume 3. It provides instructions for using the IP core to simplify interfaces to industry-standard DDR3 SDRAM devices. The guide covers the system-level diagram, release information, and device family support details.

What's inside

• About This IP Release Information
• Getting Started Design Flow
• Parameter Settings
• Compiling and Simulating
• Functional Description—ALTMEMPHY Block Description
• Functional Description—High-Performance Controller II Memory Controller Architecture
• Latency
• Timing Diagrams

Specifications

Frequently asked questions

What is the purpose of the ALTMEMPHY megafunction?

The ALTMEMPHY megafunction is an interface between a memory controller and the memory devices, and performs read and write operations to the memory.

Does the IP support data-mask (DM) pins for ×4 DDR3 SDRAM DIMMs?

No, the ALTMEMPHY megafunction does not support data-mask (DM) pins for ×4 DDR3 SDRAM DIMMs or components.

Can the DLL be shared between multiple instances of the ALTMEMPHY megafunction?

Yes, you may share some of the PLL clock outputs between multiple instances, but you cannot share a PLL between multiple instances.