The purpose of this note is to describe how to hook up video devices like a CIF Single–Chip Digital Camera to the external bus of the ADSP-BF535 Blackfin® Processor. Because of its architecture and video processing capabilities, Blackfin Processors will interface with video devices.
This document explains how to connect a single-chip CIF digital camera, specifically the OV6630, to the external bus of the ADSP-BF535 Blackfin processor. It details the asynchronous interface configuration required to receive video data, noting that the processor lacks a standard glueless interface for such devices. The note focuses on using the asynchronous interface to handle video in CIF sizes.
| Camera Output Format | differential video signals (YUV) 4:2:2, 16-bit wide |
|---|---|
| Camera Clock Frequency | 8.867MHz (PCLK) |
| Processor Internal Memory | 256kBytes of internal L2 Memory |
| CIF Frame Size | 352 X 288 pixels |
The 8.867 MHz PCLK of the OV6630 clocks a 74HC74 configured as a /2 divider to produce a 4.43 MHz output.
An AND gate controlled by the HREF signal stops data transfer during blanking periods, ensuring only active video data is stored.