Introduces the upgrades from the ADuC832 to the ADuC812, including new features and changes to register configurations. This document can help ADuC812 users quickly and efficiently modify their systems
This document serves as a migration guide for users moving from the ADuC812 to the ADuC832 MicroConverter microcontroller. It highlights the additional features of the ADuC832, such as increased program flash and on-chip RAM, and outlines the specific differences in register definitions and operation modes.
Key areas of modification covered include ADC operation, voltage reference connections, power supply monitoring, interrupt structures, watchdog timer behavior, flash programming timing, SPI timing, port drive capabilities, and the introduction of an internal PLL. The guide provides specific bit-level details and operational changes for each affected feature to assist in efficient system modification.
| Program Flash Memory | 62kB |
|---|---|
| On Chip RAM | 2kB |
| Data Flash Memory | 4kB |
| Watchdog Clock Source | 32.768kHz external crystal |
| PLL Lock Indicator | PLLCON.6 |
The ADuC832 includes 62kB program flash, 2kB on chip RAM, and 4kB data flash.
The ADC Clock divider ratios are now 8, 4, 16, and 32.
It is used to control ADC calibration as well as the busy status flag, whereas on the ADuC812 it was used only for busy status.