Analog Devices ADSP-BF535 Blackfin Processor PCI Interface Host Mode Application Note

About this manual

The ADSP-BF535 Processor includes a Revision 2.2, 3.3V-compliant, 33 MHz/32-bit Peripheral Component Interconnect (PCI) bus interface. This interface can act as either a Host or a Device. In Host mode, an external arbiter is required, and the processor is responsible for configuring PCI devices attached to the bus and arbitrating mastership.

What's inside

• Introduction
• Host Mode Overview
• Configuration Accesses
• Configuration Base Address Pointer Register
• Configuration Data Port
• Header Types
• Type 0 Configuration Accesses
• Type 1 Configuration Accesses
• Memory and I/O Resource Allocation
• Device ID Retrieval

Specifications

Frequently asked questions

Is an external arbiter required for Host mode?

Yes, an external PCI bus arbiter is required because PCI bus arbitration is not built into the ADSP-BF535 PCI peripheral.

What voltage and frequency ratings does the PCI bus interface on the ADSP-BF535 Processor support?

The interface is Revision 2.2, 3.3V-compliant, and operates at 33 MHz with a 32-bit width.

Is an external arbiter required when the ADSP-BF535 Processor operates in Host mode?

Yes, an external arbiter is required because PCI bus arbitration is not built into the ADSP-BF535 PCI peripheral.

What is the memory address of the Configuration Data Port used for configuration accesses?

The Configuration Data Port is located at the memory address 0xEEFF FFFC.