This document discusses the functionality and performance of an asynchronous memory interface developed for ADSP-BF531 / BF532 / BF533 Blackfin® processors. The interface is designed to provide a host port-like interface in applications that require a Blackfin processor to be used in conjunction with a host microcontroller. It can also be used to connect two Blackfin processors with minimal external circuitry. The maximum throughput of this implementation is 14.8 MB/s without concurrent bus activity and 8.3 MB/s while concurrent DMA activity is taking place. (e.g., simultaneous peripheral and memory DMA). Higher bandwidth interfacing can be achieved with additional external logic.
This Engineer-to-Engineer Note (EE-213) discusses the functionality and performance of an asynchronous memory interface developed for ADSP-BF531, BF532, and BF533 Blackfin processors. The interface is designed to provide a host port-like interface for applications requiring a Blackfin processor to be used with a host microcontroller or to connect two Blackfin processors with minimal external circuitry. The maximum throughput of this implementation is 14.8 MB/s without concurrent bus activity and 8.3 MB/s while concurrent DMA activity is taking place.
| Maximum throughput (no concurrent bus activity) | 14.8 MB/s |
|---|---|
| Maximum throughput (with concurrent DMA activity) | 8.3 MB/s |
| Processor models supported | ADSP-BF531 / BF532 / BF533 |
The maximum throughput is 14.8 MB/s without concurrent bus activity and 8.3 MB/s while concurrent DMA activity is taking place.
The interface is developed for ADSP-BF531, BF532, and BF533 Blackfin processors.