Analog Devices AN-399 Interfacing AD1890/AD1891 to AES Receivers

About this manual

This document addresses sample rate interfacing and compatibility issues between the AD1890/AD1891 Asynchronous Sample Rate Converter (ASRC) and digital audio components using the AES/EBU (AES3-199X) and IEC-958 standards. It specifically examines the challenges of connecting components that use different data justification formats (right-justified vs. left-justified).

What's inside

• The AES/EBU Input
• Justification Change
• The Interpolation Filter
• ASRC-Digital Filter Timing
• Conclusion

Frequently asked questions

What is the standard for interfacing digital audio components in the digital domain?

The AES/EBU AES3-199X and the IEC-958 have become the standard for interfacing digital audio components in the digital domain.

How can data justification be changed from right-justified to left-justified?

Data justification can be changed by delaying the L/R clock outputted by the receiver chip by the word clock, effectively changing the data to left justification.

What is the primary advantage of using oversampling before the digital-to-analog converter?

Oversampling moves images out in frequency, allowing for a much simpler and less expensive lower order filter to be designed.