Analog Devices AN-320B Application Note CMOS DACs and Op Amps Combine to Build Programmable Gain Amplifiers Part II


Analog Devices AN-320B Application Note CMOS DACs and Op Amps Combine to Build Programmable Gain Amplifiers Part II - cover page
Brand
Analog Devices
Document type
Application Note
Language
English
Pages
10
File format
PDF
File size
990 KB
Published
02 August, 2012
Updated
24 August, 2012
MD5 checksum
7C8804F6489C353B79C397AE0454C5C0

About this manual

Part II of this application note investigates the performance of dual CMOS DACs used as gain-setting elements in a PGA system. It details how greater accuracy over a wider dynamic range can be achieved with a dual DAC circuit compared to a single DAC solution by spreading the required system gain over two stages.

The document provides theoretical analysis, including basic equations for dual DAC PGA systems and comparisons of error sources such as integral nonlinearity and gain error. It compares the performance of a dual 12-bit DAC (AD7547LN) against single 12-bit and 14-bit DAC solutions, discussing dynamic problems related to stability and compensation in these circuits.

What's inside

  • Dual DAC Solution
  • The Basic Equations for a Dual DAC PGA
  • Comparing the Errors
  • Dynamic Problems
  • Stability and Compensation
  • AD7547LN Specifications
  • Gain Error Analysis
  • System Gain Calculation

Specifications

Resolution12 bits
Relative Accuracy (Integral Linearity)+1/2LSB max
Gain Error+1LSBmax to +2LSBmax
Output Leakage10nA max to 250nA max
Input Resistance20kΩ max

Frequently asked questions

What is the main advantage of using a dual DAC circuit over a single DAC solution?

A dual DAC approach spreads the required system gain over two stages, resulting in an overall system gain which is the product of the individual gain stages, but the overall gain error is essentially only the sum of the individual gain error terms.

Are dual DAC PGA systems suitable for DC signals?

No, they are generally considered suitable only for AC signals because the offset errors of the first stage are multiplied by the gain setting of the second stage, which can lead to large DC offset voltages.

Which device is used as an example in the error comparison tables?

The AD7547LN, a dual 12-bit DAC with full parallel loading housed in a skinny 24-pin package.

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