Analog Devices ADV202 Application Note AN-799 Test Procedures

This is an application note for ADV202 engineering samples that are 0.2(ES3) or higher. It outlines a series of recommended procedures and critical information to confirm correct hardware configuration and initialization of the ADV202. It provides test procedures for direct accesses and indirect accesses, tests to confirm correct DMA interface and JDATA mode operation, and addresses common problems the user may encounter. Performing these specific register access tests facilitates debugging systems for hardware and software errors.


Analog Devices ADV202 Application Note AN-799 Test Procedures - cover page
Brand
Analog Devices
Document type
Application Note
Language
English
Pages
8
File format
PDF
File size
171 KB
Published
02 August, 2012
Updated
30 September, 2023
Model
ADV202
MD5 checksum
F01DFA25A596FB262B63F767FEC7AF86

About this manual

This document provides a series of recommended procedures and critical information to confirm correct hardware configuration and initialization of the ADV202. It covers direct register access functionality, PLL settings, and common problems users may encounter during setup.

The note details specific test procedures for verifying direct accesses, indirect memory read/write operations using DMA interfaces, and JDATA mode operation. It includes step-by-step instructions for 32-bit and 16-bit modes to debug systems for hardware and software errors.

What's inside

  • Introduction
  • Direct Register Access Functionality
  • PLL Settings
  • Direct Register Read Test
  • Register Test Procedure (32-bit)
  • Register Test Procedure (16-bit)
  • DMA and JDATA Tests
  • DREQ/DACK Read Test

Specifications

Applicable Sample VersionES3 or higher

Frequently asked questions

What is the recommended delay after programming PLL registers?

A delay of approximately 20 microseconds is needed after which the ADV202 should undergo a reboot procedure.

What causes ACK to never be asserted during direct register access?

Possible causes include incorrect timing or incorrect PLL settings.

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