Altera Arria GX Device Configuration Chapter 11

The document 'Configuring Arria GX Devices' by Altera Corporation provides an introduction to the configuration methods and features of Arria GX II devices.


Altera Arria GX Device Configuration Chapter 11 - cover page
Brand
Altera
Document type
User Manual
Language
English
Pages
106
File format
PDF
File size
973 KB
Published
01 August, 2012
Updated
29 September, 2023
MD5 checksum
8279B720EE4214B99F895DCF3667F0F7

About this manual

This chapter describes how to configure Arria GX devices using five supported schemes: Fast Passive Parallel (FPP), Active Serial (AS), Passive Serial (PS), Passive Parallel Asynchronous (PPA), and Joint Test Action Group (JTAG). It explains that these devices use volatile SRAM cells, requiring configuration data download upon every power-up. The text details the selection of schemes via MSEL pins and lists compatible external controllers or configuration devices such as MAX II microprocessors and Enhanced Configuration Devices (EPC16, EPC8, EPC4).

Key features discussed include configuration data decompression to reduce file size and storage requirements, and remote system upgrades for real-time updates. The document provides specific information on uncompressed .rbf file sizes for various Arria GX models, pin configurations for different modes, and instructions for enabling compression within the Quartus II software environment.

What's inside

  • Introduction
  • Configuration Devices
  • Configuration Schemes
  • Configuration Features
  • Configuration Data Decompression
  • Remote System Upgrades

Frequently asked questions

What is the typical size reduction achieved by using configuration data decompression?

Preliminary data indicates that compression typically reduces configuration bitstream size by 35 to 55%.

What clock rate must the host system provide when using FPP mode with decompression?

The intelligent host must provide a DCLK that is 4x the data rate.

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