This application note introduces the features and characteristics of Xilinx's XPLA™ PLD. This PLD uses Fast Zero Power design technology, which provides ultra-low power and very high speed. This PLD supports 3V voltage and can be programmed in-system using a JTAG interface. This PLD also has a 4-pin JTAG interface and high-performance pin-to-pin delays.
The Xilinx XCR3128A is a Complex Programmable Logic Device (CPLD) from the CoolRunner family. It utilizes the innovative XPLA architecture, combining high-speed PAL paths with flexible PLA arrays to achieve up to 37 product terms per output. The device is the industry's first TotalCMOS PLD, integrating both CMOS design and process technologies.
| Pin-to-pin delay (PAL path) | 7.5 ns |
|---|---|
| Pin-to-pin delay (PLA path) | 9 ns |
| Macrocell count | 128 |
| Operating voltage (Industrial) | 2.7V to 3.6V |
| I/O tolerance | 6.5V |
| Erase/program cycles | 1000 |
| Data retention | 20 years |
The device supports up to 37 product terms per output.
Yes, it supports ISP using a JTAG interface.
It is available in TQFP and VQFP packages.