Toshiba TC74HCT08AP Quad 2-Input AND Gate Datasheet


Toshiba TC74HCT08AP Quad 2-Input AND Gate Datasheet - cover page
Brand
Toshiba
Category
Chips
Document type
Datasheet
Language
English
Pages
5
File format
PDF
File size
186 KB
Published
12 June, 2012
Updated
12 June, 2012
MD5 checksum
0419812105F242D0E179593A69D9FC2E

About this manual

This document is a technical datasheet for the TOSHIBA TC74HCT08AP/AF/AFN series of high-speed CMOS digital integrated circuits. The device is a Quad 2-Input AND Gate fabricated with silicon gate C2MOS technology, designed to achieve high-speed operation similar to LSTTL while maintaining low power dissipation.

What's inside

  • Features
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • DC Electrical Characteristics
  • AC Electrical Characteristics
  • Pin Assignment

Specifications

Technologysilicon gate C2MOS technology
Propagation Delay (Typ)10ns
Power Dissipation (Max)14A(Max.)
Input Voltage CompatibilityTTL or NMOS
Operating Temperature-40~85 °C

Frequently asked questions

What is the typical weight of a DIP 14-pin package?

The typical weight for this package is 0.969 grams.

What is the typical propagation delay time when the load capacitance is 15pF?

The typical propagation delay time is 10 nanoseconds under these conditions.

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