Hynix HY57V283220(L)T(P)/HY5V22(L)F(P) Synchronous DRAM Datasheet

This is a Hynix 4 Banks x 1M x 32Bit Synchronous DRAM, which has 134,217,728-bit CMOS Synchronous DRAM, ideal for memory applications that require wide data I/O and high bandwidth.


Hynix HY57V283220(L)T(P)/HY5V22(L)F(P) Synchronous DRAM Datasheet - cover page
Brand
Hynix
Category
Memory
Document type
Datasheet
Language
English
Pages
15
File format
PDF
File size
905 KB
Published
12 June, 2012
Updated
30 September, 2023
MD5 checksum
F00B56BB5A41926EFD77A5652D4ADE4C

About this manual

This document is a general product description for the Hynix HY57V283220(L)T(P) / HY5V22(L)F(P) Synchronous DRAM. The device is a 134,217,728-bit CMOS SDRAM organized as 4 banks of 1,048,576 x 32, designed for memory applications requiring wide data I/O and high bandwidth.

What's inside

  • Description
  • Features
  • Ordering Information
  • Pin Configuration
  • Pin Description
  • Ball Configuration

Specifications

Organization4 Banks x 1M x 32
Capacity134,217,728 bits
Power Supply3.3V
InterfaceLVTTL
Refresh Cycles4096 / 64ms

Frequently asked questions

What is the organization of the Hynix HY57V283220(L)T(P) / HY5V22(L)F(P)?

The device is organized as 4 banks of 1,048,576 x 32.

Is the device compatible with LVTTL interface?

Yes, all device pins are compatible with LVTTL interface.

What is the standard power supply voltage?

The device uses a JEDEC standard 3.3V power supply.

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