Actel eX Family FPGAs Datasheet

Actel eX Family FPGAs are low-cost solutions for low-power, high-performance designs. The inherent low power attributes of the antifuse technology, coupled with an additional low static power mode, make these devices ideal for applications requiring low power and high performance


Actel eX Family FPGAs Datasheet - cover page
Brand
Actel
Document type
Datasheet
Language
English
Pages
37
File format
PDF
File size
279 KB
Published
12 June, 2012
Updated
30 September, 2023
MD5 checksum
4A464761DBA7BF4C045BD56258D90F98

About this manual

The Actel eX Family FPGAs are a low-cost solution designed for low-power, high-performance designs. Fabricated with an advanced 0.22 CMOS antifuse technology, these devices achieve high performance without power penalties. The architecture utilizes a 'sea-of-modules' structure where the entire floor is covered with a grid of logic modules, including register cells (R-cells) and combinatorial cells (C-cells), interconnected via patented metal-to-metal programmable antifuses.

What's inside

  • General Description
  • Ordering Information
  • eX Family Architecture
  • Module Organization
  • Routing Resources
  • Clock Resources
  • Other Architectural Features
  • I/O Modules

Specifications

System Gates (Capacity)3,000 to 12,000
Maximum Flip-Flops512
Process Technology0.22 CMOS
Maximum User I/O Pins132
System Performance Frequency240 MHz
Clock-to-Out (Pad-to-Pad)3.9ns
Internal Performance Frequency350 MHz

Frequently asked questions

What is the technology used in eX Family FPGAs?

The devices are fabricated with an advanced 0.22 CMOS antifuse technology.

Can the eX FPGAs be hot-swapped?

Yes, all I/Os are tristated during power up/down to prevent damage or system degradation.

What is the maximum number of flip-flops available?

Up to 512 maximum flip-flops are available when using CC Macros.

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