IGLOO is a low-power Flash FPGA chip with features of low power consumption, high capacity, and reprogrammability. It supports core voltages from 1.2V to 1.5V and has low-power active FPGA operation. IGLOO also utilizes Flash*Freeze technology, enabling ultra-low power consumption while maintaining FPGA content. It has a high capacity ranging from 15k to 1 million system gates, up to 144 kbits of True Dual-Port SRAM, and up to 300 user I/Os. IGLOO also supports advanced encryption standard and FlashLock technology for in-system programming and security. It features segmented, hierarchical routing and clock structure, advanced I/O capabilities, and mixed-voltage operation.
The IGLOO family of flash FPGAs uses a 130‑nm flash process to deliver the lowest power FPGA solutions, supporting core voltages from 1.2 V to 1.5 V and a Flash*Freeze mode that consumes as little as 5 pW while retaining SRAM and register data. Devices are available in a range of densities from 15 k to 1 M system gates, with up to 300 user I/Os and up to 144 kbits of true dual‑port SRAM.
Security features include FlashLock and AES‑128 encryption for secure in‑system programming. The devices are live‑at‑power‑up (LAPU Level 0) and can be programmed via an IEEE 1532‑compliant JTAG interface. Various package types (UC, CS, QN, VQ, FG) provide options for different pin counts and form factors.
| Core Voltage Range | 1.2 V to 1.5 V |
|---|---|
| Maximum System Gates | 1,000,000 |
| Maximum User I/Os | 300 |
| On‑Chip FlashROM | 1 kbit |
| True Dual‑Port SRAM Capacity | up to 144 kbits |
| Integrated PLL | Yes (in most devices) |
IGLOO devices support up to 300 user I/Os depending on the package.
The highest density device, AGL1000, provides 1,000,000 system gates.