This document describes the M95256 and M95128 series of serial SPI bus EEPROMs with high-speed clock and other features.
This document describes the M95256 and M95128 electrically erasable programmable memory (EEPROM) devices, which are accessed via a high-speed SPI-compatible bus. The memory arrays are organized as 32768 x 8 bits for the M95256 and 16384 x 8 bits for the M95128. These devices support single supply voltages ranging from 1.8V to 5.5V depending on the specific part variant and offer a high clock rate of 10MHz with a 5ms write time.
| Memory Organization (M95256) | 32768 x 8 bit |
|---|---|
| Memory Organization (M95128) | 16384 x 8 bit |
| Clock Rate | 10MHz |
| Write Time | 5ms |
| Supply Voltage (M95xxx) | 4.5 to 5.5V |
| Supply Voltage (M95xxx-W) | 2.5 to 5.5V |
| Supply Voltage (M95xxx-R) | 1.8 to 5.5V |
| Erase/Write Cycles | More than 100000 |
| Data Retention | More than 40-Year |
These devices support SPI modes with CPOL=0, CPHA=0 and CPOL=1, CPHA=1.
The device is selected when the Chip Select (S) signal is taken Low.
The Hold signal is used to pause any serial communications with the device without deselecting it.