The SY87700V is a complete Clock Recovery and Data Retiming integrated circuit for data rates from 32Mbps up to 175Mbps NRZ. The device is ideally suited for SONET/SDH/ATM applications and other high-speed data transmission systems. Clock recovery and data retiming is performed by synchronizing the on-chip VCO directly to the incoming data stream. The VCO center frequency is controlled by the reference clock frequency and the selected divide ratio. On-chip clock generation is performed through the use of a frequency multiplier PLL with a byte rate source as reference. The SY87700V also includes a link fault detection circuit.
The SY87700V is an integrated circuit designed for clock recovery and data retiming in high-speed data transmission systems, specifically targeting SONET/SDH/ATM applications. It operates with NRZ data streams ranging from 32Mbps up to 175Mbps and supports both 3.3V and 5V power supply options.
The device features two on-chip Phase-Locked Loops (PLLs): one for clock generation and another for clock recovery. It includes differential PECL high-speed serial I/O, a link fault detection circuit, and is available in 28-pin SOIC and 32-pin EP-TQFP packages.
| Data Rate Range | 32Mbps up to 175Mbps NRZ |
|---|---|
| Power Supply Options | 3.3V and 5V |
| Operating Temperature Range | 0 to +85 °C |
| Storage Temperature Range | -65 to +150 °C |
| Package Types | 28-pin SOIC and 32-pin EP-TQFP |
The device supports clock and data recovery from 32Mbps up to 175Mbps NRZ.
Yes, it is compatible with SONET/SDH/ATM specifications such as OC-1 and OC-3.
The device offers 3.3V and 5V power supply options.