This data sheet introduces the features and characteristics of UC1823A/B, UC2823A/B, UC3823A/B and UC3825A/B.
The document details the UC1823A,B/1825A,B, UC2823A,B/2825A,B, and UC3823A,B/3825A,B families of PWM control integrated circuits. These devices are improved versions of the standard UC3823 and UC3825 families, offering enhanced performance in circuit blocks such as error amplifier gain bandwidth (12MHz), current limit threshold tolerance (5%), and oscillator discharge current for accurate dead time control.
Key features include high-speed PWM control with dual totem pole outputs capable of 2A peak currents, a latched overcurrent comparator with full cycle restart, and improved soft start management. The datasheet provides electrical characteristics tables covering output voltage, oscillator section parameters, error amplifier specifications, and fault sections, along with application information on oscillators, leading edge blanking, UVLO, and soft start.
| Error amplifier gain bandwidth product | 12MHz |
|---|---|
| Current limit threshold tolerance | 5% |
| Oscillator discharge current | 10mA |
| Output peak current | 2A Peak |
| Startup supply current | 100 µA |
| Supply Voltage Max | 22V |
| Maximum Duty Cycle | 85 % |
The typical startup supply current is 100 µA, which is ideal for off-line applications.
Each output is capable of 2A peak currents during transitions.
It sets a latch that ensures full discharge of the soft start capacitor before allowing a restart.