Sharp LH28F004SCB-L12 Datasheet


Sharp LH28F004SCB-L12 Datasheet - cover page
Brand
Sharp
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
48
File format
PDF
File size
3.7 MB
Published
05 June, 2012
Updated
18 July, 2012
MD5 checksum
29D23136A41627C5B80BE00627BB9B5A

About this manual

This datasheet describes Sharp's LH28F004SCB-L12 4‑Mbit SmartVoltage flash memory, covering its architecture, voltage options, and enhanced suspend capabilities. It outlines the device's intended applications, safety considerations, and compliance information.

The document includes detailed sections on memory organization, command definitions, electrical specifications, pin descriptions, and package information, along with tables for voltage combinations, timing, and performance metrics such as read access time and erase cycles.

What's inside

  • Introduction
  • New Features
  • Product Overview
  • Principles of Operation
  • Bus Operation
  • Electrical Specifications
  • Command Definitions
  • Package and Packing Specifications
  • Pin Descriptions

Specifications

Memory size4 Mbit (512 KB × 8)
Read access time120 ns
Operating voltage (Vcc)2.7 V, 3.3 V or 5 V
Vpp voltage options3.3 V, 5 V or 12 V
Package type48‑lead CSP
Block erase cycles100,000 per block (0.8 M per chip)
Block erase time~1 s (5 V Vcc, 12 V Vpp)
Deep Power‑Down modeSupported

Frequently asked questions

What voltage options does the LH28F004SCB-L12 support?

It operates at 2.7 V, 3.3 V or 5 V for Vcc, and Vpp can be 3.3 V, 5 V or 12 V.

How many erase cycles can each block endure?

Each 64‑KB block can be erased up to 100,000 times, with a total of 0.8 million cycles per chip.

What is the typical read access time?

The device provides a 120 ns read access time.

What package is the LH28F004SCB-L12 offered in?

It is supplied in a 48‑lead chip‑size package (CSP).

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