This datasheet introduces the features of IDT707288S/L high-speed 64K x 16 dual-ported SRAM, including four independent 16K x 16 memory blocks, fast asynchronous address-to-data access time 20ns, and independent port controls.
The IDT707288S/L is a 64K×16 (1 Mbit) dual‑ported SRAM organized into four independent 16K×16 banks. Each port has separate address, control and I/O pins, allowing simultaneous access to any bank. The device includes four 16‑bit mailboxes per port with interrupt generation, dual chip‑enable pins for depth expansion, and user‑controlled bank‑select inputs.
The SRAM is supplied by a single 5 V TTL‑compatible source, typically consumes about 90 mW, and operates over the commercial temperature range (0 °C to +70 °C). It is offered in a 100‑pin Thin Quad Plastic Flat‑pack (TQFP) and a 108‑pin ceramic Pin Grid Array (PGA). Ordering information and package details are provided at the end of the document.
| Memory size | 64K × 16 (1 Mbit) |
|---|---|
| Access time | 20 ns |
| Power consumption | ~90 mW |
| Packages | 100‑pin TQFP, 108‑pin PGA |
| Temperature range | Commercial (0 °C to +70 °C) |
| Number of banks | 4 independent 16K × 16 banks |
| Mailboxes per port | Four 16‑bit mailboxes |
| Dual chip enables | Allows depth expansion without external logic |
The device provides a fast asynchronous address‑to‑data access time of 20 ns.
It contains four independent 16K × 16 banks.
It is offered in a 100‑pin Thin Quad Plastic Flat‑pack (TQFP) and a 108‑pin ceramic Pin Grid Array (PGA).