FDT Manuals

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Manuals

22

Last added

2012-06-11

Latest FDT manuals

• FDT IDT54/74FCT139T/AT/CT DATA SHEET

  This document is the datasheet of IDT54/74FCT139T/AT/CT. It is a dual 1-of-4 decoder built using an advanced dual metal CMOS technology. It has two independent decoders, each of which accepts two binary weighted inputs (A0-A1) and provides four mutually exclusive active LOW outputs (O0-O3). Each de- coder has an active LOW enable (E). When E is HIGH, all outputs are forced HIGH.

• FDT IDT74FCT163244/A/C DATA SHEET

  This datasheet provides functional block diagram and feature information for the FCT163244/A/C 16-bit buffer/line driver, such as 0.5-micron CMOS process, typical output skew <250ps, ESD>2000V, packages include 25-mil pitch SSOP, 19.6-mil pitch TSSOP, and 15.7-mil pitch TVSOP, extended commercial range -40°C to +85°C, VCC=3.3V±0.3V, normal range or VCC=2.7 to 3.6V, extended range, CMOS power levels (0.4µW typical static).

• FDT IDT7025S/L DATA SHEET

  IDT7025S/L is a high-speed dual-port static RAM chip produced by Integrated Device Technology, Inc. It has true dual-port memory cells that allow simultaneous access to the same memory location. It has low power consumption of up to 750 mW and a high access speed of 20/25/35/55/70 ns.

• FDT IDT54/74FCT841AT/BT/CT/DT DATA SHEET

  The FCT8xxT series is built using an advanced dual metal CMOS technology. The FCT8xxT bus interface latches are designed to eliminate the extra packages required to buffer existing latches and provide extra data width for wider address/data paths or buses carrying parity. The FCT841T are buffered, 10-bit wide versions of the popular FCT373T function. They are ideal for use as an output port requiring high IOL/IOH. All of the FCT8xxT high-performance interface family can drive large capacitive loads, while providing low-capacitance bus loading at both inputs and outputs. All inputs have clamp diodes to ground and all outputs are designed for low-capacitance bus loading in high-impedance state.

• FDT IDT54/74FCT543 IDT54/74FCT543A IDT54/74FCT543C DATA SHEET

  DSC-4602/3 is a type of IDT54/74FCT543 series products, which is a non-inverting eight-channel transceiver. This transceiver has CMOS low power consumption and FAST speed, and can work normally in full temperature and voltage range. This product can be used for military and commercial purposes, and has strong radiation resistance.

• fdt IDT72413 DATA SHEET

  The IDT72413 is a 64x5, high-speed First-In/First-Out (FIFO) that loads and empties data on a first-in-first-out basis. It is expandable in bit width. All speed versions are cascad- able in depth. The FIFO has a Half-Full Flag, which signals when it has 32 or more words in memory. The Almost-Full/Empty Flag is active when there are 56 or more words in memory or when there are 8 or less words in memory. The IDT72413 is pin and functionally compatible to the MMI67413. It operates at a shift rate of 45MHz. This makes it ideal for use in high-speed data communications, bidirectional and rate buffer applications.

• FDT IDT54/74FCT821A/B/C IDT54/74FCT823A/B/C IDT54/74FCT824A/B/C IDT54/74FCT825A/B/C handbook

  This document describes the features and characteristics of products such as IDT54/74FCT821A/B/C, IDT54/74FCT823A/B/C, IDT54/74FCT824A/B/C, and IDT54/74FCT825A/B/C from IDT, including the pinout/function, speed, and output drive capabilities equivalent to AMD's Am29821-25 bipolar registers over the full temperature and voltage supply extremes. Additionally, this series of products features buffered common clock enable (EN) and asynchronous clear input (CLR), among others.

• FDT IDT7006S/L handbook

  IDT7006 is a high-performance 16Kx8 dual-port static RAM produced by IDT. The device has true dual-ported memory cells, supporting simultaneous access to the same memory location. IDT7006 has high performance, low power consumption and good scalability.

• FDT IDT54/74FCT861A/B IDT54/74FCT863A/B handbook

  The IDT54/74FCT800 series is built using an advanced dual metal CMOS technology. It provides high-performance bus interface buffering for wide data/address paths or buses carrying parity.

• FDT IDT54/74FCT162H272AT/CT/ET handbook

  The document describes the features and characteristics of a fast CMOS 12-bit synchronous bus exchanger, including CMOS technology, low input/output leakage, ESD protection, packaging options, and temperature range.

• FDT IDT54/74FCT240T/AT/CT/DT - 2240T/AT/CT IDT54/74FCT244T/AT/CT/DT - 2244T/AT/CT IDT54/74FCT540T/AT/CT IDT54/74FCT541/2541T/AT/CT handbook

  This document introduces the features and characteristics of IDT54/74FCT240/244T/AT/CT/DT - 2240/2244T/AT/CT, IDT54/74FCT540/541/2541T/AT/CT FAST CMOS OCTAL BUFFER/LINE DRIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES.

• FDT IDT29FCT520A IDT29FCT520B IDT29FCT520C handbook

  This document describes the features and characteristics of the product from Integrated Device Technology, Inc. (IDT). The product is a multi-level pipeline register, which is equivalent to AMD's Am29520 bipolar multilevel pipeline register in terms of pinout/function, speed, and output drive. It consists of four 8-bit high-speed registers that can be operated as a dual 2-level or single 4-level push-only stack. All registers are accessible at the multiplexed output and support hold, transfer, and load instructions. The product is manufactured using advanced CMOS processing, with substantially lower input current levels and compatibility with TTL input and output levels. It is available in both military and commercial temperature ranges, as well as radiation tolerant and radiation enhanced versions.

• FDT IDT7130SA/LA IDT7140SA/LA DATA SHEET

  The IDT7130/IDT7140 are high-speed 1K x 8 Dual-Port Static RAMs. The IDT7130 is designed to be used as a stand-alone 8-bit Dual-Port RAM or as a 'MASTER' Dual-Port RAM together with the IDT7140 'SLAVE' Dual-Port in 16-bit-or-more word width systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 16-or-more-bit memory system applications results in full-speed, error-free operation without the need for additional discrete logic.

• FDT IDT707288S/L DATA SHEET

  This datasheet introduces the features of IDT707288S/L high-speed 64K x 16 dual-ported SRAM, including four independent 16K x 16 memory blocks, fast asynchronous address-to-data access time 20ns, and independent port controls.

• FDT IDT7024S/L DATA SHEET

  This document describes the features and characteristics of the IDT7024S/L high-speed 4K x 16 dual-port static RAM, including busy and interrupt flags, port arbitration logic, support for semaphore signaling, asynchronous operation, battery backup operation, industrial temperature range, etc.