The AD679 is a 14-bit 128 kSPS ADC that integrates a high-speed sample-and-hold amplifier (SHA), ADC, 5 V reference, clock, and digital interface on a single chip. It provides a fully specified sampling A/D function that is unattainable with discrete designs. It features a conversion rate of 128k conversions per second, a full power bandwidth of 1 MHz, a full linear bandwidth of 500 kHz, and a 78 dB S/N+D ratio. The AD679 uses twos complement data format (bipolar mode) and straight binary data format (unipolar mode), has a 10MΩ input impedance, supports 8-bit bus interface, on-board reference and clock, an input range of 10V unipolar or bipolar, and is pin compatible with the AD678 12-bit 200 kSPS ADC. It also offers versions that comply with MIL-STD-883.
The AD679 is a 14‑bit monolithic analog‑to‑digital converter that combines a high‑speed sample‑and‑hold amplifier, on‑board voltage reference, clock generator and an 8‑bit bus interface on a single chip. It supports both unipolar (0‑10 V) and bipolar (‑5 V to +5 V) input ranges and offers high input impedance (10 MΩ) for direct connection to unbuffered sources.
The device is specified for 128 kSPS conversion rate, 1 MHz full‑power bandwidth and 500 kHz full‑linear bandwidth. It is supplied in 28‑lead plastic DIP, 28‑lead ceramic DIP and 44‑lead ceramic JLCC packages, operates from +5 V digital and ±12 V analog supplies, and consumes about 560 mW typical power.
| Resolution | 14 bits |
|---|---|
| Maximum Sample Rate | 128 kSPS |
| Input Impedance | 10 MΩ |
| Operating Supplies | +5 V digital, ±12 V analog |
The AD679 can convert at up to 128 kSPS, giving a conversion time of about 7.8 µs.
It operates from a +5 V digital supply and ±12 V analog supplies, consuming about 560 mW typical power.
The input impedance is 10 MΩ.