The HEF4094B is an 8-stage serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs O0 to O7. The parallel outputs may be connected directly to common bus lines. Data is shifted on positive-going clock transitions. The data in each shift register stage is transferred to the storage register when the strobe (STR) input is HIGH. Data in the storage register appears at the outputs whenever the output enable (EO) signal is HIGH. Two serial outputs (Os and O’s) are available for cascading a number of HEF4094B devices. Data is available at Os on positive-going clock edges to allow high-speed operation in cascaded systems in which the clock rise time is fast. The same serial information is available at O’s on the next negative-going clock edge and provides cascading HEF4094B devices when the clock rise time is slow.
The HEF4094B is an 8‑stage serial shift register with a storage latch for each stage and three‑state parallel outputs. Data shifts on positive‑going clock edges and can be cascaded using two serial outputs.
The datasheet includes functional and pinning diagrams, a full function table, AC characteristics, timing diagrams, package options, and example applications such as serial‑to‑parallel conversion and remote‑control holding registers.
| Package (plastic DIL) | 16‑lead DIL |
|---|---|
| Package (ceramic DIL) | 16‑lead DIL |
| Package (plastic SO) | 16‑lead SO |
| Input transition time | < 20 ns |
| Maximum clock frequency | 10‑22 MHz |
It is an 8‑stage serial shift register with storage latches and three‑state parallel outputs.
The device is offered in three 16‑lead packages: plastic DIL (HEF4094BP(N)), ceramic DIL (HEF4094BD(F)), and plastic SO (HEF4094BT(D)).
Input transition times are specified as less than 20 ns.
Typical uses include serial‑to‑parallel data conversion and remote‑control holding registers.