This document describes the features and characteristics of a product, including support for IEEE P1394b Revision 1.33+, interoperability with Firewire, i.LINK, and SB1394, support for multiple transfer rates, and energy-saving features.
The TSB81BA3D and TSB81BA3DI provide three fully backward‑compatible IEEE 1394 ports that can operate in both 1394a‑2000 and 1394b modes. They include dual supplies (3.3 V I/O and a core voltage) and an external 98.304 MHz crystal oscillator to generate reference clocks for high‑speed serial data transmission up to 800 Mbits/s.
The device offers extensive pin‑level control, including BMODE for protocol selection, TPBIAS for port biasing, and power‑down (PD) functionality. Detailed terminal descriptions, pin assignments, and a functional block diagram are provided to aid PCB layout and system integration.
| External Clock Requirement | 98.304 MHz crystal oscillator |
|---|---|
| Supported Data Rates | 98.304, 196.608, 393.216, 491.52, 983.04 Mbits/s |
| Supply Voltages | 3.3 V I/O and core voltage (DVDD‑CORE, PLLVDD‑CORE) |
| Package Type | 80‑pin TQFP |
| Power‑Down Function | Stops PLL when PD terminal is asserted high |
It uses a 3.3 V supply for I/O and a separate core voltage supply (DVDD‑CORE and PLLVDD‑CORE).
TPBIAS provides a bias voltage for port termination and indicates an active connection to remote devices.
It can transmit at 98.304, 196.608, 393.216, 491.52, or 983.04 Mbits/s depending on the selected speed.